Two Days Technical (Online) session on Questa Static Formal verification solutions by CoreEL Team - Day 1

The Session will cover the following topics:

• Introduction to FPGA tool flow
• Need for Early Verification
• Formal Adaptation & Overview of Questa Formal tools
• Intro to Questa Lint, Lint Workflow, Checks Methodology and Goals, Questa Result Analysis and Hands on Tool Demonstration
• Intro to Questa Inspect, Workflow, Predefined Checks for Common Problems, Inspect Benefits and Hands on Tool Demonstration

Two Days Technical (Online) session on Questa Static Formal verification solutions by CoreEL Team - Day 2

The Session will cover the following topics:

• Intro to Questa Increase coverage, workflow, increase coverage benefits etc.
• Checks for coverage exclusions.
• Questa increase coverage with Questa Sim and Hands on Tool Demonstration
• Intro to Questa CDC, CDC Workflow, Need for CDC Verification, Common CDC Issues Analysis and Debugging and Hands on Tool Demonstration

Technical (Online) Session on Introduction to Analog Design Concepts by ChipIN Team

The Session will cover the following topics:

• Fundamental concepts related to analog circuit design.
• Short channel effects and impacts over circuit design.
• Demo: Drawing a schematic in schematic XL editor.

Technical Online Session on Parametric Extraction with SCL 180nm Technology and Introduction to High-Gain Telescopic OpAmp Circuit Design by ChipIN Team

The Session will cover the following topics:

• High-Gain Telescopic OpAmp Circuit Design (Theory Session)
• Hands on Lab Session on High-Gain Telescopic OpAmp Circuit Design
• Lab Session on SCL 180nm (Bi-metal Process) - Parametric Extraction Using Cadence Virtuoso.

Technical Online Session on High-Gain Telescopic OpAmp Circuit Design Pre-Layout Simulations and Introduction to Analog Custom Layout Design Concepts by ChipIN Team

The Session will cover the following topics:

• Pre layout simulations of High-Gain Telescopic OpAmp Circuit Design.
• Custom Layout of High-Gain Telescopic OpAmp Circuit Design in Layout suite XL.
• LVS, DRC and layout validation techniques etc.

Technical Online Session High-Gain Telescopic OpAmp Circuit Design Post-Layout Simulations, IO Pad-Ring & Seal-Ring Integration with Core by ChipIN Team

The Session will cover the following topics:

• Hands-on Lab session on post-layout simulations to validate performance.
• Designing pad-ring, seal-ring, dummy fill and related blocks etc.

Technical Online Session on Full-Chip Simulation & Physical Verification Using Cadence Virtuoso & Siemens Calibre Tools by ChipIN Team

The Session will cover the following topics:

• The session will cover core + IO simulations of High-Gain Telescopic OpAmp Circuit Design.
• Final full-chip verification.

Technical (Online) Session on "VEGA Processors: India's Indigenous RISC-V Based Computing Revolution"

This session will introduce the core principles of the RISC-V Instruction Set Architecture (ISA) and explore the different processor variants within the RISC-V ecosystem. It will also discuss the range of peripheral IPs commonly integrated into SoC designs. Participants will gain an understanding of the architecture and integration approach of VEGA-based SoCs, as well as the design and verification processes adopted for these systems. The session will further highlight the validation strategies and methodologies employed to ensure dependable and high-quality SoC development.